2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com> * arm.h (ARM_EXT2_V6T2_V8M): New extension bit. (ARM_AEXT2_V8A): New architecture extension bitfield. (ARM_AEXT2_V8_1A): Use ARM_AEXT2_V8A instead of ARM_EXT2_ATOMICS. (ARM_AEXT_V8M_BASE): New architecture extension bitfield. (ARM_AEXT2_V8M): Add extension bit ARM_EXT2_V6T2_V8M. (ARM_ARCH_V6T2): Use ARM_EXT2_V6T2_V8M for the second extension bitfield. (ARM_ARCH_V6KT2): Likewise. (ARM_ARCH_V6ZT2): Likewise. (ARM_ARCH_V6KZT2): Likewise. (ARM_ARCH_V7): Likewise. (ARM_ARCH_V7A): Likewise. (ARM_ARCH_V7VE): Likewise. (ARM_ARCH_V7R): Likewise. (ARM_ARCH_V7M): Likewise. (ARM_ARCH_V7EM): Likewise. (ARM_ARCH_V8A): Likewise. (ARM_ARCH_V8M_BASE): New architecture bitfield. (ARM_ARCH_THUMB2): Include instructions shared by ARMv6t2 and ARMv8-M. (ARM_ARCH_V7A_SEC): Use ARM_EXT2_V6T2_V8M for the second extension bitfield and reindent. (ARM_ARCH_V7A_MP_SEC): Likewise. (ARM_ARCH_V7R_IDIV): Likewise. (ARM_ARCH_V8A_FP): Use ARM_AEXT2_V8A instead of ARM_EXT2_ATOMICS. (ARM_ARCH_V8A_SIMD): Likewise. (ARM_ARCH_V8A_CRYPTOV1): Likewise. 2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com> * arm.h (ARM_EXT2_ATOMICS): New extension bit. (ARM_EXT2_V8M): Likewise. (ARM_EXT_V8): Adjust comment with regards to atomics and remove mention of legacy use for that bit. (ARM_AEXT2_V8_1A): New architecture extension bitfield. (ARM_AEXT2_V8_2A): Likewise. (ARM_AEXT_V8M_MAIN): Likewise. (ARM_AEXT2_V8M): Likewise. (ARM_ARCH_V8A): Use ARM_EXT2_ATOMICS for features in second bitfield. (ARM_ARCH_V8_1A): Likewise with ARM_AEXT2_V8_1A. (ARM_ARCH_V8_2A): Likewise with ARM_AEXT2_V8_2A. (ARM_ARCH_V8M_MAIN): New architecture feature bitfield. (ARM_ARCH_V8A_FP): Use ARM_EXT2_ATOMICS for features in second bitfield and reindent. (ARM_ARCH_V8A_SIMD): Likewise. (ARM_ARCH_V8A_CRYPTOV1): Likewise. (ARM_ARCH_V8_1A_FP): Use ARM_AEXT2_V8_1A to set second bitfield of feature bits. (ARM_ARCH_V8_1A_SIMD): Likewise. (ARM_ARCH_V8_1A_CRYPTOV1): Likewise. 2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com> * arm.h (ARM_ARCH_THUMB2): Add comment explaining its meaning and remove extension bit not including any Thumb-2 instruction. 2015-12-15 Matthew Wahab <matthew.wahab@arm.com> * arm.h (ARM_ARCH_V8_1A): Add the CRC_EXT_ARMV8 co-processor feature macro. (ARM_ARCH_V8_2A): Likewise. 2015-12-14 Matthew Wahab <matthew.wahab@arm.com> * aarch64.h (enum aarch64_opnd_qualifier): Add AARCH64_OPND_QLF_V_2H. 2015-12-14 Yoshinori Sato <ysato@users.sourceforge.jp> * rx.h: Add new instructions. 2015-12-11 Matthew Wahab <matthew.wahab@arm.com> * aarch64.h (aarch64_opnd): Add AARCH64_OPND_BARRIER_PSB. * aarch64-asm-2.c: Regenerate. * aarch64-dis-2.c: Regenerate. * aarch64-opc-2.c: Regenerate. * aarch64-opc.c (aarch64_hint_options): Add "csync". (aarch64_print_operands): Handle AARCH64_OPND_BARRIER_PSB. * aarch64-tbl.h (aarch64_feature_stat_profile): New. (STAT_PROFILE): New. (aarch64_opcode_table): Add "psb". (AARCH64_OPERANDS): Add "BARRIER_PSB". 2015-12-11 Matthew Wahab <matthew.wahab@arm.com> * aarch64.h (aarch64_hint_options): Declare. (aarch64_opnd_info): Add field hint_option. 2015-12-11 Matthew Wahab <matthew.wahab@arm.com> * aarch64.h (AARCH64_FEATURE_PROFILE): New. 2015-12-10 Matthew Wahab <matthew.wahab@arm.com> * aarch64.h (aarch64_sys_ins_reg_supported_p): Declare. 2015-12-10 Matthew Wahab <matthew.wahab@arm.com> * aarch64.h (aarch64_sys_ins_reg): Replace has_xt with flags. (aarch64_sys_ins_reg_has_xt): Declare. 2015-12-10 Matthew Wahab <matthew.wahab@arm.com> * aarch64.h (AARCH64_FEATURE_RAS): New. (AARCH64_ARCH_V8_2): Add AARCH64_FEATURE_RAS. 2015-12-10 Matthew Wahab <matthew.wahab@arm.com> * aarch64.h (AARCH64_FEATURE_F16): Fix clash with AARCH64_FEATURE_V8_1. (AARCH64_ARCH_V8_1): Add AARCH64_FEATURE_CRC. (AARCH64_ARCH_V8_2): Add AARCH64_FEATURE_CRC and AARCH64_FEATURE_V8_1. 2015-12-04 Claudiu Zissulescu <claziss@synopsys.com> * arc.h (arc_reloc_equiv_tab): Replace flagcode with flags[32]. 2015-11-27 Matthew Wahab <matthew.wahab@arm.com> * aarch64.h (aarch64_op): Add OP_BFC. 2015-11-27 Matthew Wahab <matthew.wahab@arm.com> * aarch64.h (AARCH64_FEATURE_F16): New. (AARCH64_ARCH_V8_2): Add AARCH64_FEATURE_F16 to ARMv8.2 features. 2015-11-20 Matthew Wahab <matthew.wahab@arm.com> * aarch64.h (AARCH64_FEATURE_V8_1): New. (AARCH64_ARCH_v8_1): Add AARCH64_FEATURE_V8_1. 2015-11-19 Matthew Wahab <matthew.wahab@arm.com> * arm.h (ARM_EXT2_V8_2A): New. (ARM_ARCH_V8_2A): New. 2015-11-19 Matthew Wahab <matthew.wahab@arm.com> * aarch64.h (AARCH64_FEATURE_V8_2): New. (AARCH64_ARCH_V8_2): New. 2015-11-11 Alan Modra <amodra@gmail.com> Peter Bergner <bergner@vnet.ibm.com> * ppc.h (PPC_OPCODE_POWER9): New define. (PPC_OPCODE_VSX3): Likewise. 2015-11-02 Nick Clifton <nickc@redhat.com> * rx.h (enum RX_Opcode_ID): Add more NOP opcodes. 2015-11-02 Nick Clifton <nickc@redhat.com> * rx.h (enum RX_Operand_Type): Add RX_Operand_Zero_Indirect. 2015-10-28 Yao Qi <yao.qi@linaro.org> * aarch64.h (aarch64_decode_insn): Update declaration. 2015-10-07 Yao Qi <yao.qi@linaro.org> * aarch64.h (aarch64_sys_ins_reg) <template>: Removed. <name>: New field. 2015-10-07 Yao Qi <yao.qi@linaro.org> * aarch64.h [__cplusplus]: Wrap in extern "C". 2015-10-07 Claudiu Zissulescu <claziss@synopsys.com> Cupertino Miranda <cmiranda@synopsys.com> * arc-func.h: New file. * arc.h: Likewise. 2015-10-02 Yao Qi <yao.qi@linaro.org> * aarch64.h (aarch64_zero_register_p): Move the declaration to column one. 2015-10-02 Yao Qi <yao.qi@linaro.org> * aarch64.h (aarch64_decode_insn): Declare it. 2015-09-29 Dominik Vogt <vogt@linux.vnet.ibm.com> * s390.h (S390_INSTR_FLAG_HTM): New flag. (S390_INSTR_FLAG_VX): New flag. (S390_INSTR_FLAG_FACILITY_MASK): New flag mask. 2015-09-26 James Bowman <james.bowman@ftdichip.com> * ft32.h: Add instruction macros FT32_*() 2015-09-23 Nick Clifton <nickc@redhat.com> * ppc.h (PPC_OPSHIFT_INV): Use an unsigned constant when left shifting. 2015-09-22 Nick Clifton <nickc@redhat.com> * rx.h (enum RX_Size): Add RX_Bad_Size entry. 2015-09-09 Daniel Santos <daniel.santos@pobox.com> * visium.h (gen_reg_table): Make static. (fp_reg_table): Likewise. (cc_table): Likewise. 2015-07-20 Matthew Wahab <matthew.wahab@arm.com> * arm.h (ARM_AEXT_V6ZK): Rename to ARM_AEXT_V6KZ. (ARM_AEXT_V6ZKT2): Rename to ARM_AEXT_V6KZT2. (ARM_ARCH_V6ZK): Rename to ARM_ARCH_V6KZ. (ARM_ARCH_V6ZKT2): Rename to ARM_ARCH_V6KZT2. 2015-07-03 Alan Modra <amodra@gmail.com> * ppc.h (PPC_OPCODE_750, PPC_OPCODE_7450, PPC_OPCODE_860): Define. 2015-07-01 Sandra Loosemore <sandra@codesourcery.com> Cesar Philippidis <cesar@codesourcery.com> * nios2.h (enum iw_format_type): Add R2 formats. (enum overflow_type): Add signed_immed12_overflow and enumeration_overflow for R2. (struct nios2_opcode): Document new argument letters for R2. (REG_3BIT, REG_LDWM, REG_POP): Define. (includes): Include nios2r2.h. (nios2_r2_opcodes, nios2_num_r2_opcodes): Declare. (nios2_r2_asi_n_mappings, nios2_num_r2_asi_n_mappings): Declare. (nios2_r2_shi_n_mappings, nios2_num_r2_shi_n_mappings): Declare. (nios2_r2_andi_n_mappings, nios2_num_r2_andi_n_mappings): Declare. (nios2_r2_reg3_mappings, nios2_num_r2_reg3_mappings): Declare. (nios2_r2_reg_range_mappings, nios2_num_r2_reg_range_mappings): Declare. * nios2r2.h: New file. 2015-06-19 Peter Bergner <bergner@vnet.ibm.com> * ppc.h (PPC_OPERAND_OPTIONAL_VALUE): New. (ppc_optional_operand_value): New inline function. 2015-06-04 Matthew Wahab <matthew.wahab@arm.com> * aarch64.h (AARCH64_V8_1): New. 2015-06-03 Matthew Wahab <matthew.wahab@arm.com> * arm.h (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1): New. (ARM_ARCH_V8_1A): New. (ARM_ARCH_V8_1A_FP): New. (ARM_ARCH_V8_1A_SIMD): New. (ARM_ARCH_V8_1A_CRYPTOV1): New. (ARM_FEATURE_CORE): New. 2015-06-02 Matthew Wahab <matthew.wahab@arm.com> * arm.h (ARM_EXT2_PAN): New. (ARM_FEATURE_CORE_HIGH): New. 2015-06-02 Matthew Wahab <matthew.wahab@arm.com> * arm.h (ARM_FEATURE_ALL): New. 2015-06-02 Matthew Wahab <matthew.wahab@arm.com> * aarch64.h (AARCH64_FEATURE_RDMA): New. 2015-06-02 Matthew Wahab <matthew.wahab@arm.com> * aarch64.h (AARCH64_FEATURE_LOR): New. 2015-06-01 Matthew Wahab <matthew.wahab@arm.com> * aarch64.h (AARCH64_FEATURE_PAN): New. (aarch64_sys_reg_supported_p): Declare. (aarch64_pstatefield_supported_p): Declare. 2015-04-30 DJ Delorie <dj@redhat.com> * rl78.h (RL78_Dis_Isa): New. (rl78_decode_opcode): Add ISA parameter. 2015-03-24 Terry Guo <terry.guo@arm.com> * arm.h (arm_feature_set): Extended to provide more available bits. (ARM_ANY): Updated to follow above new definition. (ARM_CPU_HAS_FEATURE): Likewise. (ARM_CPU_IS_ANY): Likewise. (ARM_MERGE_FEATURE_SETS): Likewise. (ARM_CLEAR_FEATURE): Likewise. (ARM_FEATURE): Likewise. (ARM_FEATURE_COPY): New macro. (ARM_FEATURE_EQUAL): Likewise. (ARM_FEATURE_ZERO): Likewise. (ARM_FEATURE_CORE_EQUAL): Likewise. (ARM_FEATURE_LOW): Likewise. (ARM_FEATURE_CORE_LOW): Likewise. (ARM_FEATURE_CORE_COPROC): Likewise. 2015-02-19 Pedro Alves <palves@redhat.com> * cgen.h [__cplusplus]: Wrap in extern "C". * msp430-decode.h [__cplusplus]: Likewise. * nios2.h [__cplusplus]: Likewise. * rl78.h [__cplusplus]: Likewise. * rx.h [__cplusplus]: Likewise. * tilegx.h [__cplusplus]: Likewise. 2015-01-28 James Bowman <james.bowman@ftdichip.com> * ft32.h: New file. 2015-01-16 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * s390.h (s390_opcode_cpu_val): Add S390_OPCODE_Z13. 2015-01-01 Alan Modra <amodra@gmail.com> Update year range in copyright notice of all files. 2014-12-27 Anthony Green <green@moxielogic.com> * moxie.h (MOXIE_F1_AiB2, MOXIE_F1_ABi2): Renamed from MOXIE_F1_AiB4 and MOXIE_F1_ABi2. 2014-12-06 Eric Botcazou <ebotcazou@adacore.com> * visium.h: New file. 2014-11-28 Sandra Loosemore <sandra@codesourcery.com> * nios2.h (NIOS2_INSN_ADDI, NIOS2_INSN_ANDI): Delete. (NIOS2_INSN_ORI, NIOS2_INSN_XORI): Delete. (NIOS2_INSN_OPTARG): Renumber. 2014-11-21 Terry Guo <terry.guo@arm.com> * arm.h (FPU_VFP_EXT_ARMV8xD): New macro. (FPU_VFP_V5D16): Likewise. (FPU_VFP_V5_SP_D16): Likewise. (FPU_ARCH_VFP_V5D16): Likewise. (FPU_ARCH_VFP_V5_SP_D16): Likewise. 2014-11-06 Sandra Loosemore <sandra@codesourcery.com> * nios2.h (nios2_find_opcode_hash): Add mach parameter to declaration. Fix obsolete comment. 2014-10-23 Sandra Loosemore <sandra@codesourcery.com> * nios2.h (enum iw_format_type): New. (struct nios2_opcode): Update comments. Add size and format fields. (NIOS2_INSN_OPTARG): New. (REG_NORMAL, REG_CONTROL, REG_COPROCESSOR): New. (struct nios2_reg): Add regtype field. (GET_INSN_FIELD, SET_INSN_FIELD): Delete. (IW_A_LSB, IW_A_MSB, IW_A_SZ, IW_A_MASK): Delete. (IW_B_LSB, IW_B_MSB, IW_B_SZ, IW_B_MASK): Delete. (IW_C_LSB, IW_C_MSB, IW_C_SZ, IW_C_MASK): Delete. (IW_IMM16_LSB, IW_IMM16_MSB, IW_IMM16_SZ, IW_IMM16_MASK): Delete. (IW_IMM26_LSB, IW_IMM26_MSB, IW_IMM26_SZ, IW_IMM26_MASK): Delete. (IW_OP_LSB, IW_OP_MSB, IW_OP_SZ, IW_OP_MASK): Delete. (IW_OPX_LSB, IW_OPX_MSB, IW_OPX_SZ, IW_OPX_MASK): Delete. (IW_SHIFT_IMM5_LSB, IW_SHIFT_IMM5_MSB): Delete. (IW_SHIFT_IMM5_SZ, IW_SHIFT_IMM5_MASK): Delete. (IW_CONTROL_REGNUM_LSB, IW_CONTROL_REGNUM_MSB): Delete. (IW_CONTROL_REGNUM_SZ, IW_CONTROL_REGNUM_MASK): Delete. (OP_MASK_OP, OP_SH_OP): Delete. (OP_MASK_IOP, OP_SH_IOP): Delete. (OP_MASK_IRD, OP_SH_IRD): Delete. (OP_MASK_IRT, OP_SH_IRT): Delete. (OP_MASK_IRS, OP_SH_IRS): Delete. (OP_MASK_ROP, OP_SH_ROP): Delete. (OP_MASK_RRD, OP_SH_RRD): Delete. (OP_MASK_RRT, OP_SH_RRT): Delete. (OP_MASK_RRS, OP_SH_RRS): Delete. (OP_MASK_JOP, OP_SH_JOP): Delete. (OP_MASK_IMM26, OP_SH_IMM26): Delete. (OP_MASK_RCTL, OP_SH_RCTL): Delete. (OP_MASK_IMM5, OP_SH_IMM5): Delete. (OP_MASK_CACHE_OPX, OP_SH_CACHE_OPX): Delete. (OP_MASK_CACHE_RRS, OP_SH_CACHE_RRS): Delete. (OP_MASK_CUSTOM_A, OP_SH_CUSTOM_A): Delete. (OP_MASK_CUSTOM_B, OP_SH_CUSTOM_B): Delete. (OP_MASK_CUSTOM_C, OP_SH_CUSTOM_C): Delete. (OP_MASK_CUSTOM_N, OP_SH_CUSTOM_N): Delete. (OP_<insn>, OPX_<insn>, OP_MATCH_<insn>, OPX_MATCH_<insn>): Delete. (OP_MASK_<insn>, OP_MASK): Delete. (GET_IW_A, GET_IW_B, GET_IW_C, GET_IW_CONTROL_REGNUM): Delete. (GET_IW_IMM16, GET_IW_IMM26, GET_IW_OP, GET_IW_OPX): Delete. Include nios2r1.h to define new instruction opcode constants and accessors. (nios2_builtin_opcodes): Rename to nios2_r1_opcodes. (bfd_nios2_num_builtin_opcodes): Rename to nios2_num_r1_opcodes. (bfd_nios2_num_opcodes): Rename to nios2_num_opcodes. (NUMOPCODES, NUMREGISTERS): Delete. * nios2r1.h: New file. 2014-10-17 Jose E. Marchesi <jose.marchesi@oracle.com> * sparc.h (HWCAP2_VIS3B): Documentation improved. 2014-10-09 Jose E. Marchesi <jose.marchesi@oracle.com> * sparc.h (sparc_opcode): new field `hwcaps2'. (HWCAP2_FJATHPLUS): New define. (HWCAP2_VIS3B): Likewise. (HWCAP2_ADP): Likewise. (HWCAP2_SPARC5): Likewise. (HWCAP2_MWAIT): Likewise. (HWCAP2_XMPMUL): Likewise. (HWCAP2_XMONT): Likewise. (HWCAP2_NSEC): Likewise. (HWCAP2_FJATHHPC): Likewise. (HWCAP2_FJDES): Likewise. (HWCAP2_FJAES): Likewise. Document the new operand kind `{', corresponding to the mcdper ancillary state register. Document the new operand kind }, which represents frsd floating point registers (double precision) which must be the same than frs1 in its containing instruction. 2014-09-16 Kuan-Lin Chen <kuanlinchentw@gmail.com> * nds32.h: Add new opcode declaration. 2014-09-15 Andrew Bennett <andrew.bennett@imgtec.com> Matthew Fortune <matthew.fortune@imgtec.com> * mips.h (mips_operand_type): Add new entries: OP_SAME_RS_RT, OP_CHECK_PREV and OP_NON_ZERO_REG. Add descriptions for the MIPS R6 instruction arguments: -a, -b, -d, -s, -t, -u, -v, -w, -x, -y, -A, -B, +I, +O, +R, +:, +\, +", +; (mips_check_prev_operand): New struct. (INSN2_FORBIDDEN_SLOT): New define. (INSN_ISA32R6): New define. (INSN_ISA64R6): New define. (INSN_UPTO32R6): New define. (INSN_UPTO64R6): New define. (mips_isa_table): Add INSN_UPTO32R6 and INSN_UPTO64R6. (ISA_MIPS32R6): New define. (ISA_MIPS64R6): New define. (CPU_MIPS32R6): New define. (CPU_MIPS64R6): New define. (cpu_is_member): Add cases for CPU_MIPS32R6, and CPU_MIPS64R6. 2014-09-03 Jiong Wang <jiong.wang@arm.com> * aarch64.h (AARCH64_FEATURE_LSE): New feature added. (aarch64_opnd): Add AARCH64_OPND_PAIRREG. (aarch64_insn_class): Add lse_atomic. (F_LSE_SZ): New field added. (opcode_has_special_coder): Recognize F_LSE_SZ. 2014-08-26 Maciej W. Rozycki <macro@codesourcery.com> * mips.h: Document the move of `MICROMIPSOP_*_CODE10' from `B' over to `+J'. 2014-07-29 Matthew Fortune <matthew.fortune@imgtec.com> * mips.h (INSN_LOAD_COPROC_DELAY): Rename to... (INSN_LOAD_COPROC): New define. (INSN_COPROC_MOVE_DELAY): Rename to... (INSN_COPROC_MOVE): New define. 2014-07-01 Barney Stratford <barney_stratford@fastmail.fm> Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com> Pitchumani Sivanupandi <pitchumani.s@atmel.com> Soundararajan <Sounderarajan.D@atmel.com> * avr.h (AVR_ISA_TINY): Define avrtiny specific ISA. (AVR_ISA_2xxxa): Define ISA without LPM. (AVR_ISA_AVRTINY): Define avrtiny arch ISA. Add doc for contraint used in 16 bit lds/sts. Adjust ISA group for icall, ijmp, pop and push. Add 16 bit lds/sts encoding and update 32 bit lds/sts constraints. 2014-05-19 Nick Clifton <nickc@redhat.com> * msp430.h (struct msp430_operand_s): Add vshift field. 2014-05-07 Andrew Bennett <andrew.bennett@imgtec.com> * mips.h (INSN_ISA_MASK): Updated. (INSN_ISA32R3): New define. (INSN_ISA32R5): New define. (INSN_ISA64R3): New define. (INSN_ISA64R5): New define. (INSN_ISA64, INSN_ISA64R2, INSN_ISA3_32, INSN_ISA3_32R2, INSN_ISA4_32 INSN_ISA4_32R2, INSN_ISA5_32R2): Renumbered. (mips_isa_table): Add entries for mips32r3, mips32r5, mips64r3 and mips64r5. (INSN_UPTO32R3): New define. (INSN_UPTO32R5): New define.Lines 1–500 of 2596. Load more
2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com> * arm.h (ARM_EXT2_V6T2_V8M): New extension bit. (ARM_AEXT2_V8A): New architecture extension bitfield. (ARM_AEXT2_V8_1A): Use ARM_AEXT2_V8A instead of ARM_EXT2_ATOMICS. (ARM_AEXT_V8M_BASE): New architecture extension bitfield. (ARM_AEXT2_V8M): Add extension bit ARM_EXT2_V6T2_V8M. (ARM_ARCH_V6T2): Use ARM_EXT2_V6T2_V8M for the second extension bitfield. (ARM_ARCH_V6KT2): Likewise. (ARM_ARCH_V6ZT2): Likewise. (ARM_ARCH_V6KZT2): Likewise. (ARM_ARCH_V7): Likewise. (ARM_ARCH_V7A): Likewise. (ARM_ARCH_V7VE): Likewise. (ARM_ARCH_V7R): Likewise. (ARM_ARCH_V7M): Likewise. (ARM_ARCH_V7EM): Likewise. (ARM_ARCH_V8A): Likewise. (ARM_ARCH_V8M_BASE): New architecture bitfield. (ARM_ARCH_THUMB2): Include instructions shared by ARMv6t2 and ARMv8-M. (ARM_ARCH_V7A_SEC): Use ARM_EXT2_V6T2_V8M for the second extension bitfield and reindent. (ARM_ARCH_V7A_MP_SEC): Likewise. (ARM_ARCH_V7R_IDIV): Likewise. (ARM_ARCH_V8A_FP): Use ARM_AEXT2_V8A instead of ARM_EXT2_ATOMICS. (ARM_ARCH_V8A_SIMD): Likewise. (ARM_ARCH_V8A_CRYPTOV1): Likewise. 2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com> * arm.h (ARM_EXT2_ATOMICS): New extension bit. (ARM_EXT2_V8M): Likewise. (ARM_EXT_V8): Adjust comment with regards to atomics and remove mention of legacy use for that bit. (ARM_AEXT2_V8_1A): New architecture extension bitfield. (ARM_AEXT2_V8_2A): Likewise. (ARM_AEXT_V8M_MAIN): Likewise. (ARM_AEXT2_V8M): Likewise. (ARM_ARCH_V8A): Use ARM_EXT2_ATOMICS for features in second bitfield. (ARM_ARCH_V8_1A): Likewise with ARM_AEXT2_V8_1A. (ARM_ARCH_V8_2A): Likewise with ARM_AEXT2_V8_2A. (ARM_ARCH_V8M_MAIN): New architecture feature bitfield. (ARM_ARCH_V8A_FP): Use ARM_EXT2_ATOMICS for features in second bitfield and reindent. (ARM_ARCH_V8A_SIMD): Likewise. (ARM_ARCH_V8A_CRYPTOV1): Likewise. (ARM_ARCH_V8_1A_FP): Use ARM_AEXT2_V8_1A to set second bitfield of feature bits. (ARM_ARCH_V8_1A_SIMD): Likewise. (ARM_ARCH_V8_1A_CRYPTOV1): Likewise. 2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com> * arm.h (ARM_ARCH_THUMB2): Add comment explaining its meaning and remove extension bit not including any Thumb-2 instruction. 2015-12-15 Matthew Wahab <matthew.wahab@arm.com> * arm.h (ARM_ARCH_V8_1A): Add the CRC_EXT_ARMV8 co-processor feature macro. (ARM_ARCH_V8_2A): Likewise. 2015-12-14 Matthew Wahab <matthew.wahab@arm.com> * aarch64.h (enum aarch64_opnd_qualifier): Add AARCH64_OPND_QLF_V_2H. 2015-12-14 Yoshinori Sato <ysato@users.sourceforge.jp> * rx.h: Add new instructions. 2015-12-11 Matthew Wahab <matthew.wahab@arm.com> * aarch64.h (aarch64_opnd): Add AARCH64_OPND_BARRIER_PSB. * aarch64-asm-2.c: Regenerate. * aarch64-dis-2.c: Regenerate. * aarch64-opc-2.c: Regenerate. * aarch64-opc.c (aarch64_hint_options): Add "csync". (aarch64_print_operands): Handle AARCH64_OPND_BARRIER_PSB. * aarch64-tbl.h (aarch64_feature_stat_profile): New. (STAT_PROFILE): New. (aarch64_opcode_table): Add "psb". (AARCH64_OPERANDS): Add "BARRIER_PSB". 2015-12-11 Matthew Wahab <matthew.wahab@arm.com> * aarch64.h (aarch64_hint_options): Declare. (aarch64_opnd_info): Add field hint_option. 2015-12-11 Matthew Wahab <matthew.wahab@arm.com> * aarch64.h (AARCH64_FEATURE_PROFILE): New. 2015-12-10 Matthew Wahab <matthew.wahab@arm.com> * aarch64.h (aarch64_sys_ins_reg_supported_p): Declare. 2015-12-10 Matthew Wahab <matthew.wahab@arm.com> * aarch64.h (aarch64_sys_ins_reg): Replace has_xt with flags. (aarch64_sys_ins_reg_has_xt): Declare. 2015-12-10 Matthew Wahab <matthew.wahab@arm.com> * aarch64.h (AARCH64_FEATURE_RAS): New. (AARCH64_ARCH_V8_2): Add AARCH64_FEATURE_RAS. 2015-12-10 Matthew Wahab <matthew.wahab@arm.com> * aarch64.h (AARCH64_FEATURE_F16): Fix clash with AARCH64_FEATURE_V8_1. (AARCH64_ARCH_V8_1): Add AARCH64_FEATURE_CRC. (AARCH64_ARCH_V8_2): Add AARCH64_FEATURE_CRC and AARCH64_FEATURE_V8_1. 2015-12-04 Claudiu Zissulescu <claziss@synopsys.com> * arc.h (arc_reloc_equiv_tab): Replace flagcode with flags[32]. 2015-11-27 Matthew Wahab <matthew.wahab@arm.com> * aarch64.h (aarch64_op): Add OP_BFC. 2015-11-27 Matthew Wahab <matthew.wahab@arm.com> * aarch64.h (AARCH64_FEATURE_F16): New. (AARCH64_ARCH_V8_2): Add AARCH64_FEATURE_F16 to ARMv8.2 features. 2015-11-20 Matthew Wahab <matthew.wahab@arm.com> * aarch64.h (AARCH64_FEATURE_V8_1): New. (AARCH64_ARCH_v8_1): Add AARCH64_FEATURE_V8_1. 2015-11-19 Matthew Wahab <matthew.wahab@arm.com> * arm.h (ARM_EXT2_V8_2A): New. (ARM_ARCH_V8_2A): New. 2015-11-19 Matthew Wahab <matthew.wahab@arm.com> * aarch64.h (AARCH64_FEATURE_V8_2): New. (AARCH64_ARCH_V8_2): New. 2015-11-11 Alan Modra <amodra@gmail.com> Peter Bergner <bergner@vnet.ibm.com> * ppc.h (PPC_OPCODE_POWER9): New define. (PPC_OPCODE_VSX3): Likewise. 2015-11-02 Nick Clifton <nickc@redhat.com> * rx.h (enum RX_Opcode_ID): Add more NOP opcodes. 2015-11-02 Nick Clifton <nickc@redhat.com> * rx.h (enum RX_Operand_Type): Add RX_Operand_Zero_Indirect. 2015-10-28 Yao Qi <yao.qi@linaro.org> * aarch64.h (aarch64_decode_insn): Update declaration. 2015-10-07 Yao Qi <yao.qi@linaro.org> * aarch64.h (aarch64_sys_ins_reg) <template>: Removed. <name>: New field. 2015-10-07 Yao Qi <yao.qi@linaro.org> * aarch64.h [__cplusplus]: Wrap in extern "C". 2015-10-07 Claudiu Zissulescu <claziss@synopsys.com> Cupertino Miranda <cmiranda@synopsys.com> * arc-func.h: New file. * arc.h: Likewise. 2015-10-02 Yao Qi <yao.qi@linaro.org> * aarch64.h (aarch64_zero_register_p): Move the declaration to column one. 2015-10-02 Yao Qi <yao.qi@linaro.org> * aarch64.h (aarch64_decode_insn): Declare it. 2015-09-29 Dominik Vogt <vogt@linux.vnet.ibm.com> * s390.h (S390_INSTR_FLAG_HTM): New flag. (S390_INSTR_FLAG_VX): New flag. (S390_INSTR_FLAG_FACILITY_MASK): New flag mask. 2015-09-26 James Bowman <james.bowman@ftdichip.com> * ft32.h: Add instruction macros FT32_*() 2015-09-23 Nick Clifton <nickc@redhat.com> * ppc.h (PPC_OPSHIFT_INV): Use an unsigned constant when left shifting. 2015-09-22 Nick Clifton <nickc@redhat.com> * rx.h (enum RX_Size): Add RX_Bad_Size entry. 2015-09-09 Daniel Santos <daniel.santos@pobox.com> * visium.h (gen_reg_table): Make static. (fp_reg_table): Likewise. (cc_table): Likewise. 2015-07-20 Matthew Wahab <matthew.wahab@arm.com> * arm.h (ARM_AEXT_V6ZK): Rename to ARM_AEXT_V6KZ. (ARM_AEXT_V6ZKT2): Rename to ARM_AEXT_V6KZT2. (ARM_ARCH_V6ZK): Rename to ARM_ARCH_V6KZ. (ARM_ARCH_V6ZKT2): Rename to ARM_ARCH_V6KZT2. 2015-07-03 Alan Modra <amodra@gmail.com> * ppc.h (PPC_OPCODE_750, PPC_OPCODE_7450, PPC_OPCODE_860): Define. 2015-07-01 Sandra Loosemore <sandra@codesourcery.com> Cesar Philippidis <cesar@codesourcery.com> * nios2.h (enum iw_format_type): Add R2 formats. (enum overflow_type): Add signed_immed12_overflow and enumeration_overflow for R2. (struct nios2_opcode): Document new argument letters for R2. (REG_3BIT, REG_LDWM, REG_POP): Define. (includes): Include nios2r2.h. (nios2_r2_opcodes, nios2_num_r2_opcodes): Declare. (nios2_r2_asi_n_mappings, nios2_num_r2_asi_n_mappings): Declare. (nios2_r2_shi_n_mappings, nios2_num_r2_shi_n_mappings): Declare. (nios2_r2_andi_n_mappings, nios2_num_r2_andi_n_mappings): Declare. (nios2_r2_reg3_mappings, nios2_num_r2_reg3_mappings): Declare. (nios2_r2_reg_range_mappings, nios2_num_r2_reg_range_mappings): Declare. * nios2r2.h: New file. 2015-06-19 Peter Bergner <bergner@vnet.ibm.com> * ppc.h (PPC_OPERAND_OPTIONAL_VALUE): New. (ppc_optional_operand_value): New inline function. 2015-06-04 Matthew Wahab <matthew.wahab@arm.com> * aarch64.h (AARCH64_V8_1): New. 2015-06-03 Matthew Wahab <matthew.wahab@arm.com> * arm.h (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1): New. (ARM_ARCH_V8_1A): New. (ARM_ARCH_V8_1A_FP): New. (ARM_ARCH_V8_1A_SIMD): New. (ARM_ARCH_V8_1A_CRYPTOV1): New. (ARM_FEATURE_CORE): New. 2015-06-02 Matthew Wahab <matthew.wahab@arm.com> * arm.h (ARM_EXT2_PAN): New. (ARM_FEATURE_CORE_HIGH): New. 2015-06-02 Matthew Wahab <matthew.wahab@arm.com> * arm.h (ARM_FEATURE_ALL): New. 2015-06-02 Matthew Wahab <matthew.wahab@arm.com> * aarch64.h (AARCH64_FEATURE_RDMA): New. 2015-06-02 Matthew Wahab <matthew.wahab@arm.com> * aarch64.h (AARCH64_FEATURE_LOR): New. 2015-06-01 Matthew Wahab <matthew.wahab@arm.com> * aarch64.h (AARCH64_FEATURE_PAN): New. (aarch64_sys_reg_supported_p): Declare. (aarch64_pstatefield_supported_p): Declare. 2015-04-30 DJ Delorie <dj@redhat.com> * rl78.h (RL78_Dis_Isa): New. (rl78_decode_opcode): Add ISA parameter. 2015-03-24 Terry Guo <terry.guo@arm.com> * arm.h (arm_feature_set): Extended to provide more available bits. (ARM_ANY): Updated to follow above new definition. (ARM_CPU_HAS_FEATURE): Likewise. (ARM_CPU_IS_ANY): Likewise. (ARM_MERGE_FEATURE_SETS): Likewise. (ARM_CLEAR_FEATURE): Likewise. (ARM_FEATURE): Likewise. (ARM_FEATURE_COPY): New macro. (ARM_FEATURE_EQUAL): Likewise. (ARM_FEATURE_ZERO): Likewise. (ARM_FEATURE_CORE_EQUAL): Likewise. (ARM_FEATURE_LOW): Likewise. (ARM_FEATURE_CORE_LOW): Likewise. (ARM_FEATURE_CORE_COPROC): Likewise. 2015-02-19 Pedro Alves <palves@redhat.com> * cgen.h [__cplusplus]: Wrap in extern "C". * msp430-decode.h [__cplusplus]: Likewise. * nios2.h [__cplusplus]: Likewise. * rl78.h [__cplusplus]: Likewise. * rx.h [__cplusplus]: Likewise. * tilegx.h [__cplusplus]: Likewise. 2015-01-28 James Bowman <james.bowman@ftdichip.com> * ft32.h: New file. 2015-01-16 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * s390.h (s390_opcode_cpu_val): Add S390_OPCODE_Z13. 2015-01-01 Alan Modra <amodra@gmail.com> Update year range in copyright notice of all files. 2014-12-27 Anthony Green <green@moxielogic.com> * moxie.h (MOXIE_F1_AiB2, MOXIE_F1_ABi2): Renamed from MOXIE_F1_AiB4 and MOXIE_F1_ABi2. 2014-12-06 Eric Botcazou <ebotcazou@adacore.com> * visium.h: New file. 2014-11-28 Sandra Loosemore <sandra@codesourcery.com> * nios2.h (NIOS2_INSN_ADDI, NIOS2_INSN_ANDI): Delete. (NIOS2_INSN_ORI, NIOS2_INSN_XORI): Delete. (NIOS2_INSN_OPTARG): Renumber. 2014-11-21 Terry Guo <terry.guo@arm.com> * arm.h (FPU_VFP_EXT_ARMV8xD): New macro. (FPU_VFP_V5D16): Likewise. (FPU_VFP_V5_SP_D16): Likewise. (FPU_ARCH_VFP_V5D16): Likewise. (FPU_ARCH_VFP_V5_SP_D16): Likewise. 2014-11-06 Sandra Loosemore <sandra@codesourcery.com> * nios2.h (nios2_find_opcode_hash): Add mach parameter to declaration. Fix obsolete comment. 2014-10-23 Sandra Loosemore <sandra@codesourcery.com> * nios2.h (enum iw_format_type): New. (struct nios2_opcode): Update comments. Add size and format fields. (NIOS2_INSN_OPTARG): New. (REG_NORMAL, REG_CONTROL, REG_COPROCESSOR): New. (struct nios2_reg): Add regtype field. (GET_INSN_FIELD, SET_INSN_FIELD): Delete. (IW_A_LSB, IW_A_MSB, IW_A_SZ, IW_A_MASK): Delete. (IW_B_LSB, IW_B_MSB, IW_B_SZ, IW_B_MASK): Delete. (IW_C_LSB, IW_C_MSB, IW_C_SZ, IW_C_MASK): Delete. (IW_IMM16_LSB, IW_IMM16_MSB, IW_IMM16_SZ, IW_IMM16_MASK): Delete. (IW_IMM26_LSB, IW_IMM26_MSB, IW_IMM26_SZ, IW_IMM26_MASK): Delete. (IW_OP_LSB, IW_OP_MSB, IW_OP_SZ, IW_OP_MASK): Delete. (IW_OPX_LSB, IW_OPX_MSB, IW_OPX_SZ, IW_OPX_MASK): Delete. (IW_SHIFT_IMM5_LSB, IW_SHIFT_IMM5_MSB): Delete. (IW_SHIFT_IMM5_SZ, IW_SHIFT_IMM5_MASK): Delete. (IW_CONTROL_REGNUM_LSB, IW_CONTROL_REGNUM_MSB): Delete. (IW_CONTROL_REGNUM_SZ, IW_CONTROL_REGNUM_MASK): Delete. (OP_MASK_OP, OP_SH_OP): Delete. (OP_MASK_IOP, OP_SH_IOP): Delete. (OP_MASK_IRD, OP_SH_IRD): Delete. (OP_MASK_IRT, OP_SH_IRT): Delete. (OP_MASK_IRS, OP_SH_IRS): Delete. (OP_MASK_ROP, OP_SH_ROP): Delete. (OP_MASK_RRD, OP_SH_RRD): Delete. (OP_MASK_RRT, OP_SH_RRT): Delete. (OP_MASK_RRS, OP_SH_RRS): Delete. (OP_MASK_JOP, OP_SH_JOP): Delete. (OP_MASK_IMM26, OP_SH_IMM26): Delete. (OP_MASK_RCTL, OP_SH_RCTL): Delete. (OP_MASK_IMM5, OP_SH_IMM5): Delete. (OP_MASK_CACHE_OPX, OP_SH_CACHE_OPX): Delete. (OP_MASK_CACHE_RRS, OP_SH_CACHE_RRS): Delete. (OP_MASK_CUSTOM_A, OP_SH_CUSTOM_A): Delete. (OP_MASK_CUSTOM_B, OP_SH_CUSTOM_B): Delete. (OP_MASK_CUSTOM_C, OP_SH_CUSTOM_C): Delete. (OP_MASK_CUSTOM_N, OP_SH_CUSTOM_N): Delete. (OP_<insn>, OPX_<insn>, OP_MATCH_<insn>, OPX_MATCH_<insn>): Delete. (OP_MASK_<insn>, OP_MASK): Delete. (GET_IW_A, GET_IW_B, GET_IW_C, GET_IW_CONTROL_REGNUM): Delete. (GET_IW_IMM16, GET_IW_IMM26, GET_IW_OP, GET_IW_OPX): Delete. Include nios2r1.h to define new instruction opcode constants and accessors. (nios2_builtin_opcodes): Rename to nios2_r1_opcodes. (bfd_nios2_num_builtin_opcodes): Rename to nios2_num_r1_opcodes. (bfd_nios2_num_opcodes): Rename to nios2_num_opcodes. (NUMOPCODES, NUMREGISTERS): Delete. * nios2r1.h: New file. 2014-10-17 Jose E. Marchesi <jose.marchesi@oracle.com> * sparc.h (HWCAP2_VIS3B): Documentation improved. 2014-10-09 Jose E. Marchesi <jose.marchesi@oracle.com> * sparc.h (sparc_opcode): new field `hwcaps2'. (HWCAP2_FJATHPLUS): New define. (HWCAP2_VIS3B): Likewise. (HWCAP2_ADP): Likewise. (HWCAP2_SPARC5): Likewise. (HWCAP2_MWAIT): Likewise. (HWCAP2_XMPMUL): Likewise. (HWCAP2_XMONT): Likewise. (HWCAP2_NSEC): Likewise. (HWCAP2_FJATHHPC): Likewise. (HWCAP2_FJDES): Likewise. (HWCAP2_FJAES): Likewise. Document the new operand kind `{', corresponding to the mcdper ancillary state register. Document the new operand kind }, which represents frsd floating point registers (double precision) which must be the same than frs1 in its containing instruction. 2014-09-16 Kuan-Lin Chen <kuanlinchentw@gmail.com> * nds32.h: Add new opcode declaration. 2014-09-15 Andrew Bennett <andrew.bennett@imgtec.com> Matthew Fortune <matthew.fortune@imgtec.com> * mips.h (mips_operand_type): Add new entries: OP_SAME_RS_RT, OP_CHECK_PREV and OP_NON_ZERO_REG. Add descriptions for the MIPS R6 instruction arguments: -a, -b, -d, -s, -t, -u, -v, -w, -x, -y, -A, -B, +I, +O, +R, +:, +\, +", +; (mips_check_prev_operand): New struct. (INSN2_FORBIDDEN_SLOT): New define. (INSN_ISA32R6): New define. (INSN_ISA64R6): New define. (INSN_UPTO32R6): New define. (INSN_UPTO64R6): New define. (mips_isa_table): Add INSN_UPTO32R6 and INSN_UPTO64R6. (ISA_MIPS32R6): New define. (ISA_MIPS64R6): New define. (CPU_MIPS32R6): New define. (CPU_MIPS64R6): New define. (cpu_is_member): Add cases for CPU_MIPS32R6, and CPU_MIPS64R6. 2014-09-03 Jiong Wang <jiong.wang@arm.com> * aarch64.h (AARCH64_FEATURE_LSE): New feature added. (aarch64_opnd): Add AARCH64_OPND_PAIRREG. (aarch64_insn_class): Add lse_atomic. (F_LSE_SZ): New field added. (opcode_has_special_coder): Recognize F_LSE_SZ. 2014-08-26 Maciej W. Rozycki <macro@codesourcery.com> * mips.h: Document the move of `MICROMIPSOP_*_CODE10' from `B' over to `+J'. 2014-07-29 Matthew Fortune <matthew.fortune@imgtec.com> * mips.h (INSN_LOAD_COPROC_DELAY): Rename to... (INSN_LOAD_COPROC): New define. (INSN_COPROC_MOVE_DELAY): Rename to... (INSN_COPROC_MOVE): New define. 2014-07-01 Barney Stratford <barney_stratford@fastmail.fm> Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com> Pitchumani Sivanupandi <pitchumani.s@atmel.com> Soundararajan <Sounderarajan.D@atmel.com> * avr.h (AVR_ISA_TINY): Define avrtiny specific ISA. (AVR_ISA_2xxxa): Define ISA without LPM. (AVR_ISA_AVRTINY): Define avrtiny arch ISA. Add doc for contraint used in 16 bit lds/sts. Adjust ISA group for icall, ijmp, pop and push. Add 16 bit lds/sts encoding and update 32 bit lds/sts constraints. 2014-05-19 Nick Clifton <nickc@redhat.com> * msp430.h (struct msp430_operand_s): Add vshift field. 2014-05-07 Andrew Bennett <andrew.bennett@imgtec.com> * mips.h (INSN_ISA_MASK): Updated. (INSN_ISA32R3): New define. (INSN_ISA32R5): New define. (INSN_ISA64R3): New define. (INSN_ISA64R5): New define. (INSN_ISA64, INSN_ISA64R2, INSN_ISA3_32, INSN_ISA3_32R2, INSN_ISA4_32 INSN_ISA4_32R2, INSN_ISA5_32R2): Renumbered. (mips_isa_table): Add entries for mips32r3, mips32r5, mips64r3 and mips64r5. (INSN_UPTO32R3): New define. (INSN_UPTO32R5): New define.