/* KVX assembler/disassembler support. Copyright (C) 2009-2026 Free Software Foundation, Inc. Contributed by Kalray SA. This file is part of GNU Binutils. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 3 of the license, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; see the file COPYING3. If not, see <http://www.gnu.org/licenses/>. */ #ifndef OPCODE_KVX_H#define OPCODE_KVX_H #define KVXMAXSYLLABLES 3#define KVXMAXOPERANDS 7#define KVXMAXBUNDLEISSUE 6#define KVXMAXBUNDLEWORDS 8#define KVXNUMCORES 3#define KVXNUMBUNDLINGS 19 /* * The following macros are provided for compatibility with old * code. They should not be used in new code. */ /***********************************************//* DATA TYPES *//***********************************************/ /* Operand definition -- used in building *//* format table */ enum kvx_rel { /* Absolute relocation. */ KVX_REL_ABS, /* PC relative relocation. */ KVX_REL_PC, /* GP relative relocation. */ KVX_REL_GP, /* TP relative relocation. */ KVX_REL_TP, /* GOT relative relocation. */ KVX_REL_GOT, /* BASE load address relative relocation. */ KVX_REL_BASE,}; struct kvx_reloc { /* Size in bits. */ int bitsize; /* Type of relative relocation. */ enum kvx_rel relative; /* Number of BFD relocations. */ int reloc_nb; /* List of BFD relocations. */ unsigned int relocs[];}; struct kvx_bitfield { /* Number of bits. */ int size; /* Offset in abstract value. */ int from_offset; /* Offset in encoded value. */ int to_offset;}; struct kvx_operand { /* Operand type name. */ const char *tname; /* Type of operand. */ int type; /* Width of the operand. */ int width; /* Encoded value shift. */ int shift; /* Encoded value bias. */ int bias; /* Can be SIGNED|CANEXTEND|BITMASK|WRAPPED. */ int flags; /* Number of registers. */ int reg_nb; /* Valid registers for this operand (if no register get null pointer). */ int *regs; /* Number of relocations. */ int reloc_nb; /* List of relocations that can be applied to this operand. */ struct kvx_reloc **relocs; /* Number of given bitfields. */ int bitfields; /* Bitfields in most to least significant order. */ struct kvx_bitfield bfield[];}; struct kvx_pseudo_relocs{ enum { S32_LO5_UP27, S37_LO10_UP27, S43_LO10_UP27_EX6, S64_LO10_UP27_EX27, S16, S32, S64, } reloc_type; int bitsize; /* Used when pseudo func should expand to different relocations based on the 32/64 bits mode. Enum values should match the kvx_arch_size var set by -m32 */ enum { PSEUDO_ALL = 0, PSEUDO_32_ONLY = 32, PSEUDO_64_ONLY = 64, } avail_modes; /* set to 1 when pseudo func does not take an argument */ int has_no_arg; bfd_reloc_code_real_type reloc_lo5, reloc_lo10, reloc_up27, reloc_ex; bfd_reloc_code_real_type single; struct kvx_reloc *kreloc;}; struct symbol; struct pseudo_func{ const char *name; struct symbol *sym; struct kvx_pseudo_relocs pseudo_relocs;}; /* some flags for kvx_operand *//* kvxSIGNED : is this operand treated as signed ? *//* kvxCANEXTEND : can this operand have an extension *//* kvxBITMASK : this operand is a bit mask *//* kvxWRAPPED : this operand can accept signed and unsigned integer ranges */ #define kvxSIGNED 1#define kvxCANEXTEND 2#define kvxBITMASK 4#define kvxWRAPPED 8 #define kvxOPCODE_FLAG_UNDEF 0 #define kvxOPCODE_FLAG_IMMX0 1#define kvxOPCODE_FLAG_IMMX1 2#define kvxOPCODE_FLAG_BCU 4#define kvxOPCODE_FLAG_ALU 8#define kvxOPCODE_FLAG_LSU 16#define kvxOPCODE_FLAG_MAU 32#define kvxOPCODE_FLAG_MODE64 64#define kvxOPCODE_FLAG_MODE32 128/* Opcode definition. */ struct kvx_codeword { /* The opcode. */ unsigned opcode; /* Disassembly mask. */ unsigned mask; /* Target dependent flags. */ unsigned flags;}; struct kvxopc { /* asm name */ const char *as_op; /* 32 bits code words. */ struct kvx_codeword codewords[KVXMAXSYLLABLES]; /* Number of words in codewords[]. */ int wordcount; /* coding size in case of variable length. */ unsigned coding_size; /* Bundling class. */ int bundling; /* Reservation class. */ int reservation; /* 0 terminated. */ struct kvx_operand *format[KVXMAXOPERANDS + 1]; /* Resource class. */ const char *rclass; /* Formating string. */ const char *fmtstring;}; struct kvx_core_info { struct kvxopc *optab; const char *name; const int *resources; int elf_core; struct pseudo_func *pseudo_funcs; int nb_pseudo_funcs; int **reservation_table_table; int reservation_table_lines; int resource_max; char **resource_names;}; struct kvx_Register { int id; const char *name;}; extern const int kvx_kv3_v1_reservation_table_lines;extern const int *kvx_kv3_v1_reservation_table_table[];extern const char *kvx_kv3_v1_resource_names[]; extern const int kvx_kv3_v1_resources[];extern struct kvxopc kvx_kv3_v1_optab[];extern const struct kvx_core_info kvx_kv3_v1_core_info;extern const int kvx_kv3_v2_reservation_table_lines;extern const int *kvx_kv3_v2_reservation_table_table[];extern const char *kvx_kv3_v2_resource_names[]; extern const int kvx_kv3_v2_resources[];extern struct kvxopc kvx_kv3_v2_optab[];extern const struct kvx_core_info kvx_kv3_v2_core_info;extern const int kvx_kv4_v1_reservation_table_lines;extern const int *kvx_kv4_v1_reservation_table_table[];extern const char *kvx_kv4_v1_resource_names[]; extern const int kvx_kv4_v1_resources[];extern struct kvxopc kvx_kv4_v1_optab[];extern const struct kvx_core_info kvx_kv4_v1_core_info;extern const struct kvx_core_info *kvx_core_info_table[];extern const char ***kvx_modifiers_table[];extern const struct kvx_Register *kvx_registers_table[];extern const int *kvx_regfiles_table[]; #define KVX_REGFILE_FIRST_GPR 0#define KVX_REGFILE_LAST_GPR 1#define KVX_REGFILE_DEC_GPR 2#define KVX_REGFILE_FIRST_PGR 3#define KVX_REGFILE_LAST_PGR 4#define KVX_REGFILE_DEC_PGR 5#define KVX_REGFILE_FIRST_QGR 6#define KVX_REGFILE_LAST_QGR 7#define KVX_REGFILE_DEC_QGR 8#define KVX_REGFILE_FIRST_SFR 9#define KVX_REGFILE_LAST_SFR 10#define KVX_REGFILE_DEC_SFR 11#define KVX_REGFILE_FIRST_X16R 12#define KVX_REGFILE_LAST_X16R 13#define KVX_REGFILE_DEC_X16R 14#define KVX_REGFILE_FIRST_X2R 15#define KVX_REGFILE_LAST_X2R 16#define KVX_REGFILE_DEC_X2R 17#define KVX_REGFILE_FIRST_X32R 18#define KVX_REGFILE_LAST_X32R 19#define KVX_REGFILE_DEC_X32R 20#define KVX_REGFILE_FIRST_X4R 21#define KVX_REGFILE_LAST_X4R 22#define KVX_REGFILE_DEC_X4R 23#define KVX_REGFILE_FIRST_X64R 24#define KVX_REGFILE_LAST_X64R 25#define KVX_REGFILE_DEC_X64R 26#define KVX_REGFILE_FIRST_X8R 27#define KVX_REGFILE_LAST_X8R 28#define KVX_REGFILE_DEC_X8R 29#define KVX_REGFILE_FIRST_XBR 30#define KVX_REGFILE_LAST_XBR 31#define KVX_REGFILE_DEC_XBR 32#define KVX_REGFILE_FIRST_XCR 33#define KVX_REGFILE_LAST_XCR 34#define KVX_REGFILE_DEC_XCR 35#define KVX_REGFILE_FIRST_XMR 36#define KVX_REGFILE_LAST_XMR 37#define KVX_REGFILE_DEC_XMR 38#define KVX_REGFILE_FIRST_XTR 39#define KVX_REGFILE_LAST_XTR 40#define KVX_REGFILE_DEC_XTR 41#define KVX_REGFILE_FIRST_XVR 42#define KVX_REGFILE_LAST_XVR 43#define KVX_REGFILE_DEC_XVR 44#define KVX_REGFILE_REGISTERS 45#define KVX_REGFILE_DEC_REGISTERS 46 extern int kvx_kv3_v1_regfiles[];extern const char **kvx_kv3_v1_modifiers[];extern struct kvx_Register kvx_kv3_v1_registers[]; extern int kvx_kv3_v1_dec_registers[]; enum Method_kvx_kv3_v1_enum { Immediate_kv3_v1_pcrel17 = 1, Immediate_kv3_v1_pcrel27 = 2, Immediate_kv3_v1_signed10 = 3, Immediate_kv3_v1_signed16 = 4, Immediate_kv3_v1_signed27 = 5, Immediate_kv3_v1_signed37 = 6, Immediate_kv3_v1_signed43 = 7, Immediate_kv3_v1_signed54 = 8, Immediate_kv3_v1_sysnumber = 9, Immediate_kv3_v1_unsigned6 = 10, Immediate_kv3_v1_wrapped32 = 11, Immediate_kv3_v1_wrapped64 = 12, Modifier_kv3_v1_column = 13, Modifier_kv3_v1_comparison = 14, Modifier_kv3_v1_doscale = 15, Modifier_kv3_v1_exunum = 16, Modifier_kv3_v1_floatcomp = 17, Modifier_kv3_v1_qindex = 18, Modifier_kv3_v1_rectify = 19, Modifier_kv3_v1_rounding = 20, Modifier_kv3_v1_roundint = 21, Modifier_kv3_v1_saturate = 22, Modifier_kv3_v1_scalarcond = 23, Modifier_kv3_v1_silent = 24, Modifier_kv3_v1_simplecond = 25, Modifier_kv3_v1_speculate = 26, Modifier_kv3_v1_splat32 = 27, Modifier_kv3_v1_variant = 28, RegClass_kv3_v1_aloneReg = 29, RegClass_kv3_v1_blockReg = 30, RegClass_kv3_v1_blockReg0M4 = 31, RegClass_kv3_v1_blockReg1M4 = 32, RegClass_kv3_v1_blockReg2M4 = 33, RegClass_kv3_v1_blockReg3M4 = 34, RegClass_kv3_v1_blockRegE = 35, RegClass_kv3_v1_blockRegO = 36, RegClass_kv3_v1_blockReg_0 = 37, RegClass_kv3_v1_blockReg_1 = 38, RegClass_kv3_v1_buffer16Reg = 39, RegClass_kv3_v1_buffer2Reg = 40, RegClass_kv3_v1_buffer32Reg = 41, RegClass_kv3_v1_buffer4Reg = 42, RegClass_kv3_v1_buffer64Reg = 43, RegClass_kv3_v1_buffer8Reg = 44, RegClass_kv3_v1_coproReg = 45, RegClass_kv3_v1_coproReg0M4 = 46, RegClass_kv3_v1_coproReg1M4 = 47, RegClass_kv3_v1_coproReg2M4 = 48, RegClass_kv3_v1_coproReg3M4 = 49, RegClass_kv3_v1_matrixReg = 50, RegClass_kv3_v1_matrixReg_0 = 51, RegClass_kv3_v1_matrixReg_1 = 52, RegClass_kv3_v1_matrixReg_2 = 53, RegClass_kv3_v1_matrixReg_3 = 54, RegClass_kv3_v1_onlyfxReg = 55, RegClass_kv3_v1_onlygetReg = 56, RegClass_kv3_v1_onlyraReg = 57, RegClass_kv3_v1_onlysetReg = 58, RegClass_kv3_v1_onlyswapReg = 59, RegClass_kv3_v1_pairedReg = 60, RegClass_kv3_v1_pairedReg_0 = 61, RegClass_kv3_v1_pairedReg_1 = 62, RegClass_kv3_v1_quadReg = 63, RegClass_kv3_v1_quadReg_0 = 64, RegClass_kv3_v1_quadReg_1 = 65, RegClass_kv3_v1_quadReg_2 = 66, RegClass_kv3_v1_quadReg_3 = 67, RegClass_kv3_v1_singleReg = 68, RegClass_kv3_v1_systemReg = 69, RegClass_kv3_v1_tileReg = 70, RegClass_kv3_v1_tileReg_0 = 71, RegClass_kv3_v1_tileReg_1 = 72, RegClass_kv3_v1_vectorReg = 73, RegClass_kv3_v1_vectorRegE = 74, RegClass_kv3_v1_vectorRegO = 75, RegClass_kv3_v1_vectorReg_0 = 76, RegClass_kv3_v1_vectorReg_1 = 77, RegClass_kv3_v1_vectorReg_2 = 78, RegClass_kv3_v1_vectorReg_3 = 79, Instruction_kv3_v1_abdd = 80, Instruction_kv3_v1_abdhq = 81, Instruction_kv3_v1_abdw = 82, Instruction_kv3_v1_abdwp = 83, Instruction_kv3_v1_absd = 84, Instruction_kv3_v1_abshq = 85, Instruction_kv3_v1_absw = 86, Instruction_kv3_v1_abswp = 87, Instruction_kv3_v1_acswapd = 88, Instruction_kv3_v1_acswapw = 89, Instruction_kv3_v1_addcd = 90, Instruction_kv3_v1_addcd_i = 91, Instruction_kv3_v1_addd = 92, Instruction_kv3_v1_addhcp_c = 93, Instruction_kv3_v1_addhq = 94, Instruction_kv3_v1_addsd = 95, Instruction_kv3_v1_addshq = 96, Instruction_kv3_v1_addsw = 97, Instruction_kv3_v1_addswp = 98, Instruction_kv3_v1_adduwd = 99, Instruction_kv3_v1_addw = 100, Instruction_kv3_v1_addwc_c = 101, Instruction_kv3_v1_addwd = 102, Instruction_kv3_v1_addwp = 103, Instruction_kv3_v1_addx16d = 104, Instruction_kv3_v1_addx16hq = 105, Instruction_kv3_v1_addx16uwd = 106, Instruction_kv3_v1_addx16w = 107, Instruction_kv3_v1_addx16wd = 108, Instruction_kv3_v1_addx16wp = 109, Instruction_kv3_v1_addx2d = 110, Instruction_kv3_v1_addx2hq = 111, Instruction_kv3_v1_addx2uwd = 112, Instruction_kv3_v1_addx2w = 113, Instruction_kv3_v1_addx2wd = 114, Instruction_kv3_v1_addx2wp = 115, Instruction_kv3_v1_addx4d = 116, Instruction_kv3_v1_addx4hq = 117, Instruction_kv3_v1_addx4uwd = 118, Instruction_kv3_v1_addx4w = 119, Instruction_kv3_v1_addx4wd = 120, Instruction_kv3_v1_addx4wp = 121, Instruction_kv3_v1_addx8d = 122, Instruction_kv3_v1_addx8hq = 123, Instruction_kv3_v1_addx8uwd = 124, Instruction_kv3_v1_addx8w = 125, Instruction_kv3_v1_addx8wd = 126, Instruction_kv3_v1_addx8wp = 127, Instruction_kv3_v1_aladdd = 128, Instruction_kv3_v1_aladdw = 129, Instruction_kv3_v1_alclrd = 130, Instruction_kv3_v1_alclrw = 131, Instruction_kv3_v1_aligno = 132, Instruction_kv3_v1_alignv = 133, Instruction_kv3_v1_andd = 134, Instruction_kv3_v1_andnd = 135, Instruction_kv3_v1_andnw = 136, Instruction_kv3_v1_andw = 137, Instruction_kv3_v1_avghq = 138, Instruction_kv3_v1_avgrhq = 139, Instruction_kv3_v1_avgruhq = 140, Instruction_kv3_v1_avgruw = 141, Instruction_kv3_v1_avgruwp = 142, Instruction_kv3_v1_avgrw = 143, Instruction_kv3_v1_avgrwp = 144, Instruction_kv3_v1_avguhq = 145, Instruction_kv3_v1_avguw = 146, Instruction_kv3_v1_avguwp = 147, Instruction_kv3_v1_avgw = 148, Instruction_kv3_v1_avgwp = 149, Instruction_kv3_v1_await = 150, Instruction_kv3_v1_barrier = 151, Instruction_kv3_v1_call = 152, Instruction_kv3_v1_cb = 153, Instruction_kv3_v1_cbsd = 154, Instruction_kv3_v1_cbsw = 155, Instruction_kv3_v1_cbswp = 156, Instruction_kv3_v1_clrf = 157, Instruction_kv3_v1_clsd = 158, Instruction_kv3_v1_clsw = 159, Instruction_kv3_v1_clswp = 160, Instruction_kv3_v1_clzd = 161, Instruction_kv3_v1_clzw = 162, Instruction_kv3_v1_clzwp = 163, Instruction_kv3_v1_cmoved = 164, Instruction_kv3_v1_cmovehq = 165, Instruction_kv3_v1_cmovewp = 166, Instruction_kv3_v1_cmuldt = 167, Instruction_kv3_v1_cmulghxdt = 168, Instruction_kv3_v1_cmulglxdt = 169, Instruction_kv3_v1_cmulgmxdt = 170, Instruction_kv3_v1_cmulxdt = 171, Instruction_kv3_v1_compd = 172, Instruction_kv3_v1_compnhq = 173, Instruction_kv3_v1_compnwp = 174, Instruction_kv3_v1_compuwd = 175, Instruction_kv3_v1_compw = 176, Instruction_kv3_v1_compwd = 177, Instruction_kv3_v1_convdhv0 = 178, Instruction_kv3_v1_convdhv1 = 179, Instruction_kv3_v1_convwbv0 = 180, Instruction_kv3_v1_convwbv1 = 181, Instruction_kv3_v1_convwbv2 = 182, Instruction_kv3_v1_convwbv3 = 183, Instruction_kv3_v1_copyd = 184, Instruction_kv3_v1_copyo = 185, Instruction_kv3_v1_copyq = 186, Instruction_kv3_v1_copyw = 187, Instruction_kv3_v1_crcbellw = 188, Instruction_kv3_v1_crcbelmw = 189, Instruction_kv3_v1_crclellw = 190, Instruction_kv3_v1_crclelmw = 191, Instruction_kv3_v1_ctzd = 192, Instruction_kv3_v1_ctzw = 193, Instruction_kv3_v1_ctzwp = 194,Lines 1–500 of 3157. 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/* KVX assembler/disassembler support. Copyright (C) 2009-2026 Free Software Foundation, Inc. Contributed by Kalray SA. This file is part of GNU Binutils. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 3 of the license, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; see the file COPYING3. If not, see <http://www.gnu.org/licenses/>. */ #ifndef OPCODE_KVX_H #define OPCODE_KVX_H #define KVXMAXSYLLABLES 3 #define KVXMAXOPERANDS 7 #define KVXMAXBUNDLEISSUE 6 #define KVXMAXBUNDLEWORDS 8 #define KVXNUMCORES 3 #define KVXNUMBUNDLINGS 19 /* * The following macros are provided for compatibility with old * code. They should not be used in new code. */ /***********************************************/ /* DATA TYPES */ /***********************************************/ /* Operand definition -- used in building */ /* format table */ enum kvx_rel { /* Absolute relocation. */ KVX_REL_ABS, /* PC relative relocation. */ KVX_REL_PC, /* GP relative relocation. */ KVX_REL_GP, /* TP relative relocation. */ KVX_REL_TP, /* GOT relative relocation. */ KVX_REL_GOT, /* BASE load address relative relocation. */ KVX_REL_BASE, }; struct kvx_reloc { /* Size in bits. */ int bitsize; /* Type of relative relocation. */ enum kvx_rel relative; /* Number of BFD relocations. */ int reloc_nb; /* List of BFD relocations. */ unsigned int relocs[]; }; struct kvx_bitfield { /* Number of bits. */ int size; /* Offset in abstract value. */ int from_offset; /* Offset in encoded value. */ int to_offset; }; struct kvx_operand { /* Operand type name. */ const char *tname; /* Type of operand. */ int type; /* Width of the operand. */ int width; /* Encoded value shift. */ int shift; /* Encoded value bias. */ int bias; /* Can be SIGNED|CANEXTEND|BITMASK|WRAPPED. */ int flags; /* Number of registers. */ int reg_nb; /* Valid registers for this operand (if no register get null pointer). */ int *regs; /* Number of relocations. */ int reloc_nb; /* List of relocations that can be applied to this operand. */ struct kvx_reloc **relocs; /* Number of given bitfields. */ int bitfields; /* Bitfields in most to least significant order. */ struct kvx_bitfield bfield[]; }; struct kvx_pseudo_relocs { enum { S32_LO5_UP27, S37_LO10_UP27, S43_LO10_UP27_EX6, S64_LO10_UP27_EX27, S16, S32, S64, } reloc_type; int bitsize; /* Used when pseudo func should expand to different relocations based on the 32/64 bits mode. Enum values should match the kvx_arch_size var set by -m32 */ enum { PSEUDO_ALL = 0, PSEUDO_32_ONLY = 32, PSEUDO_64_ONLY = 64, } avail_modes; /* set to 1 when pseudo func does not take an argument */ int has_no_arg; bfd_reloc_code_real_type reloc_lo5, reloc_lo10, reloc_up27, reloc_ex; bfd_reloc_code_real_type single; struct kvx_reloc *kreloc; }; struct symbol; struct pseudo_func { const char *name; struct symbol *sym; struct kvx_pseudo_relocs pseudo_relocs; }; /* some flags for kvx_operand */ /* kvxSIGNED : is this operand treated as signed ? */ /* kvxCANEXTEND : can this operand have an extension */ /* kvxBITMASK : this operand is a bit mask */ /* kvxWRAPPED : this operand can accept signed and unsigned integer ranges */ #define kvxSIGNED 1 #define kvxCANEXTEND 2 #define kvxBITMASK 4 #define kvxWRAPPED 8 #define kvxOPCODE_FLAG_UNDEF 0 #define kvxOPCODE_FLAG_IMMX0 1 #define kvxOPCODE_FLAG_IMMX1 2 #define kvxOPCODE_FLAG_BCU 4 #define kvxOPCODE_FLAG_ALU 8 #define kvxOPCODE_FLAG_LSU 16 #define kvxOPCODE_FLAG_MAU 32 #define kvxOPCODE_FLAG_MODE64 64 #define kvxOPCODE_FLAG_MODE32 128 /* Opcode definition. */ struct kvx_codeword { /* The opcode. */ unsigned opcode; /* Disassembly mask. */ unsigned mask; /* Target dependent flags. */ unsigned flags; }; struct kvxopc { /* asm name */ const char *as_op; /* 32 bits code words. */ struct kvx_codeword codewords[KVXMAXSYLLABLES]; /* Number of words in codewords[]. */ int wordcount; /* coding size in case of variable length. */ unsigned coding_size; /* Bundling class. */ int bundling; /* Reservation class. */ int reservation; /* 0 terminated. */ struct kvx_operand *format[KVXMAXOPERANDS + 1]; /* Resource class. */ const char *rclass; /* Formating string. */ const char *fmtstring; }; struct kvx_core_info { struct kvxopc *optab; const char *name; const int *resources; int elf_core; struct pseudo_func *pseudo_funcs; int nb_pseudo_funcs; int **reservation_table_table; int reservation_table_lines; int resource_max; char **resource_names; }; struct kvx_Register { int id; const char *name; }; extern const int kvx_kv3_v1_reservation_table_lines; extern const int *kvx_kv3_v1_reservation_table_table[]; extern const char *kvx_kv3_v1_resource_names[]; extern const int kvx_kv3_v1_resources[]; extern struct kvxopc kvx_kv3_v1_optab[]; extern const struct kvx_core_info kvx_kv3_v1_core_info; extern const int kvx_kv3_v2_reservation_table_lines; extern const int *kvx_kv3_v2_reservation_table_table[]; extern const char *kvx_kv3_v2_resource_names[]; extern const int kvx_kv3_v2_resources[]; extern struct kvxopc kvx_kv3_v2_optab[]; extern const struct kvx_core_info kvx_kv3_v2_core_info; extern const int kvx_kv4_v1_reservation_table_lines; extern const int *kvx_kv4_v1_reservation_table_table[]; extern const char *kvx_kv4_v1_resource_names[]; extern const int kvx_kv4_v1_resources[]; extern struct kvxopc kvx_kv4_v1_optab[]; extern const struct kvx_core_info kvx_kv4_v1_core_info; extern const struct kvx_core_info *kvx_core_info_table[]; extern const char ***kvx_modifiers_table[]; extern const struct kvx_Register *kvx_registers_table[]; extern const int *kvx_regfiles_table[]; #define KVX_REGFILE_FIRST_GPR 0 #define KVX_REGFILE_LAST_GPR 1 #define KVX_REGFILE_DEC_GPR 2 #define KVX_REGFILE_FIRST_PGR 3 #define KVX_REGFILE_LAST_PGR 4 #define KVX_REGFILE_DEC_PGR 5 #define KVX_REGFILE_FIRST_QGR 6 #define KVX_REGFILE_LAST_QGR 7 #define KVX_REGFILE_DEC_QGR 8 #define KVX_REGFILE_FIRST_SFR 9 #define KVX_REGFILE_LAST_SFR 10 #define KVX_REGFILE_DEC_SFR 11 #define KVX_REGFILE_FIRST_X16R 12 #define KVX_REGFILE_LAST_X16R 13 #define KVX_REGFILE_DEC_X16R 14 #define KVX_REGFILE_FIRST_X2R 15 #define KVX_REGFILE_LAST_X2R 16 #define KVX_REGFILE_DEC_X2R 17 #define KVX_REGFILE_FIRST_X32R 18 #define KVX_REGFILE_LAST_X32R 19 #define KVX_REGFILE_DEC_X32R 20 #define KVX_REGFILE_FIRST_X4R 21 #define KVX_REGFILE_LAST_X4R 22 #define KVX_REGFILE_DEC_X4R 23 #define KVX_REGFILE_FIRST_X64R 24 #define KVX_REGFILE_LAST_X64R 25 #define KVX_REGFILE_DEC_X64R 26 #define KVX_REGFILE_FIRST_X8R 27 #define KVX_REGFILE_LAST_X8R 28 #define KVX_REGFILE_DEC_X8R 29 #define KVX_REGFILE_FIRST_XBR 30 #define KVX_REGFILE_LAST_XBR 31 #define KVX_REGFILE_DEC_XBR 32 #define KVX_REGFILE_FIRST_XCR 33 #define KVX_REGFILE_LAST_XCR 34 #define KVX_REGFILE_DEC_XCR 35 #define KVX_REGFILE_FIRST_XMR 36 #define KVX_REGFILE_LAST_XMR 37 #define KVX_REGFILE_DEC_XMR 38 #define KVX_REGFILE_FIRST_XTR 39 #define KVX_REGFILE_LAST_XTR 40 #define KVX_REGFILE_DEC_XTR 41 #define KVX_REGFILE_FIRST_XVR 42 #define KVX_REGFILE_LAST_XVR 43 #define KVX_REGFILE_DEC_XVR 44 #define KVX_REGFILE_REGISTERS 45 #define KVX_REGFILE_DEC_REGISTERS 46 extern int kvx_kv3_v1_regfiles[]; extern const char **kvx_kv3_v1_modifiers[]; extern struct kvx_Register kvx_kv3_v1_registers[]; extern int kvx_kv3_v1_dec_registers[]; enum Method_kvx_kv3_v1_enum { Immediate_kv3_v1_pcrel17 = 1, Immediate_kv3_v1_pcrel27 = 2, Immediate_kv3_v1_signed10 = 3, Immediate_kv3_v1_signed16 = 4, Immediate_kv3_v1_signed27 = 5, Immediate_kv3_v1_signed37 = 6, Immediate_kv3_v1_signed43 = 7, Immediate_kv3_v1_signed54 = 8, Immediate_kv3_v1_sysnumber = 9, Immediate_kv3_v1_unsigned6 = 10, Immediate_kv3_v1_wrapped32 = 11, Immediate_kv3_v1_wrapped64 = 12, Modifier_kv3_v1_column = 13, Modifier_kv3_v1_comparison = 14, Modifier_kv3_v1_doscale = 15, Modifier_kv3_v1_exunum = 16, Modifier_kv3_v1_floatcomp = 17, Modifier_kv3_v1_qindex = 18, Modifier_kv3_v1_rectify = 19, Modifier_kv3_v1_rounding = 20, Modifier_kv3_v1_roundint = 21, Modifier_kv3_v1_saturate = 22, Modifier_kv3_v1_scalarcond = 23, Modifier_kv3_v1_silent = 24, Modifier_kv3_v1_simplecond = 25, Modifier_kv3_v1_speculate = 26, Modifier_kv3_v1_splat32 = 27, Modifier_kv3_v1_variant = 28, RegClass_kv3_v1_aloneReg = 29, RegClass_kv3_v1_blockReg = 30, RegClass_kv3_v1_blockReg0M4 = 31, RegClass_kv3_v1_blockReg1M4 = 32, RegClass_kv3_v1_blockReg2M4 = 33, RegClass_kv3_v1_blockReg3M4 = 34, RegClass_kv3_v1_blockRegE = 35, RegClass_kv3_v1_blockRegO = 36, RegClass_kv3_v1_blockReg_0 = 37, RegClass_kv3_v1_blockReg_1 = 38, RegClass_kv3_v1_buffer16Reg = 39, RegClass_kv3_v1_buffer2Reg = 40, RegClass_kv3_v1_buffer32Reg = 41, RegClass_kv3_v1_buffer4Reg = 42, RegClass_kv3_v1_buffer64Reg = 43, RegClass_kv3_v1_buffer8Reg = 44, RegClass_kv3_v1_coproReg = 45, RegClass_kv3_v1_coproReg0M4 = 46, RegClass_kv3_v1_coproReg1M4 = 47, RegClass_kv3_v1_coproReg2M4 = 48, RegClass_kv3_v1_coproReg3M4 = 49, RegClass_kv3_v1_matrixReg = 50, RegClass_kv3_v1_matrixReg_0 = 51, RegClass_kv3_v1_matrixReg_1 = 52, RegClass_kv3_v1_matrixReg_2 = 53, RegClass_kv3_v1_matrixReg_3 = 54, RegClass_kv3_v1_onlyfxReg = 55, RegClass_kv3_v1_onlygetReg = 56, RegClass_kv3_v1_onlyraReg = 57, RegClass_kv3_v1_onlysetReg = 58, RegClass_kv3_v1_onlyswapReg = 59, RegClass_kv3_v1_pairedReg = 60, RegClass_kv3_v1_pairedReg_0 = 61, RegClass_kv3_v1_pairedReg_1 = 62, RegClass_kv3_v1_quadReg = 63, RegClass_kv3_v1_quadReg_0 = 64, RegClass_kv3_v1_quadReg_1 = 65, RegClass_kv3_v1_quadReg_2 = 66, RegClass_kv3_v1_quadReg_3 = 67, RegClass_kv3_v1_singleReg = 68, RegClass_kv3_v1_systemReg = 69, RegClass_kv3_v1_tileReg = 70, RegClass_kv3_v1_tileReg_0 = 71, RegClass_kv3_v1_tileReg_1 = 72, RegClass_kv3_v1_vectorReg = 73, RegClass_kv3_v1_vectorRegE = 74, RegClass_kv3_v1_vectorRegO = 75, RegClass_kv3_v1_vectorReg_0 = 76, RegClass_kv3_v1_vectorReg_1 = 77, RegClass_kv3_v1_vectorReg_2 = 78, RegClass_kv3_v1_vectorReg_3 = 79, Instruction_kv3_v1_abdd = 80, Instruction_kv3_v1_abdhq = 81, Instruction_kv3_v1_abdw = 82, Instruction_kv3_v1_abdwp = 83, Instruction_kv3_v1_absd = 84, Instruction_kv3_v1_abshq = 85, Instruction_kv3_v1_absw = 86, Instruction_kv3_v1_abswp = 87, Instruction_kv3_v1_acswapd = 88, Instruction_kv3_v1_acswapw = 89, Instruction_kv3_v1_addcd = 90, Instruction_kv3_v1_addcd_i = 91, Instruction_kv3_v1_addd = 92, Instruction_kv3_v1_addhcp_c = 93, Instruction_kv3_v1_addhq = 94, Instruction_kv3_v1_addsd = 95, Instruction_kv3_v1_addshq = 96, Instruction_kv3_v1_addsw = 97, Instruction_kv3_v1_addswp = 98, Instruction_kv3_v1_adduwd = 99, Instruction_kv3_v1_addw = 100, Instruction_kv3_v1_addwc_c = 101, Instruction_kv3_v1_addwd = 102, Instruction_kv3_v1_addwp = 103, Instruction_kv3_v1_addx16d = 104, Instruction_kv3_v1_addx16hq = 105, Instruction_kv3_v1_addx16uwd = 106, Instruction_kv3_v1_addx16w = 107, Instruction_kv3_v1_addx16wd = 108, Instruction_kv3_v1_addx16wp = 109, Instruction_kv3_v1_addx2d = 110, Instruction_kv3_v1_addx2hq = 111, Instruction_kv3_v1_addx2uwd = 112, Instruction_kv3_v1_addx2w = 113, Instruction_kv3_v1_addx2wd = 114, Instruction_kv3_v1_addx2wp = 115, Instruction_kv3_v1_addx4d = 116, Instruction_kv3_v1_addx4hq = 117, Instruction_kv3_v1_addx4uwd = 118, Instruction_kv3_v1_addx4w = 119, Instruction_kv3_v1_addx4wd = 120, Instruction_kv3_v1_addx4wp = 121, Instruction_kv3_v1_addx8d = 122, Instruction_kv3_v1_addx8hq = 123, Instruction_kv3_v1_addx8uwd = 124, Instruction_kv3_v1_addx8w = 125, Instruction_kv3_v1_addx8wd = 126, Instruction_kv3_v1_addx8wp = 127, Instruction_kv3_v1_aladdd = 128, Instruction_kv3_v1_aladdw = 129, Instruction_kv3_v1_alclrd = 130, Instruction_kv3_v1_alclrw = 131, Instruction_kv3_v1_aligno = 132, Instruction_kv3_v1_alignv = 133, Instruction_kv3_v1_andd = 134, Instruction_kv3_v1_andnd = 135, Instruction_kv3_v1_andnw = 136, Instruction_kv3_v1_andw = 137, Instruction_kv3_v1_avghq = 138, Instruction_kv3_v1_avgrhq = 139, Instruction_kv3_v1_avgruhq = 140, Instruction_kv3_v1_avgruw = 141, Instruction_kv3_v1_avgruwp = 142, Instruction_kv3_v1_avgrw = 143, Instruction_kv3_v1_avgrwp = 144, Instruction_kv3_v1_avguhq = 145, Instruction_kv3_v1_avguw = 146, Instruction_kv3_v1_avguwp = 147, Instruction_kv3_v1_avgw = 148, Instruction_kv3_v1_avgwp = 149, Instruction_kv3_v1_await = 150, Instruction_kv3_v1_barrier = 151, Instruction_kv3_v1_call = 152, Instruction_kv3_v1_cb = 153, Instruction_kv3_v1_cbsd = 154, Instruction_kv3_v1_cbsw = 155, Instruction_kv3_v1_cbswp = 156, Instruction_kv3_v1_clrf = 157, Instruction_kv3_v1_clsd = 158, Instruction_kv3_v1_clsw = 159, Instruction_kv3_v1_clswp = 160, Instruction_kv3_v1_clzd = 161, Instruction_kv3_v1_clzw = 162, Instruction_kv3_v1_clzwp = 163, Instruction_kv3_v1_cmoved = 164, Instruction_kv3_v1_cmovehq = 165, Instruction_kv3_v1_cmovewp = 166, Instruction_kv3_v1_cmuldt = 167, Instruction_kv3_v1_cmulghxdt = 168, Instruction_kv3_v1_cmulglxdt = 169, Instruction_kv3_v1_cmulgmxdt = 170, Instruction_kv3_v1_cmulxdt = 171, Instruction_kv3_v1_compd = 172, Instruction_kv3_v1_compnhq = 173, Instruction_kv3_v1_compnwp = 174, Instruction_kv3_v1_compuwd = 175, Instruction_kv3_v1_compw = 176, Instruction_kv3_v1_compwd = 177, Instruction_kv3_v1_convdhv0 = 178, Instruction_kv3_v1_convdhv1 = 179, Instruction_kv3_v1_convwbv0 = 180, Instruction_kv3_v1_convwbv1 = 181, Instruction_kv3_v1_convwbv2 = 182, Instruction_kv3_v1_convwbv3 = 183, Instruction_kv3_v1_copyd = 184, Instruction_kv3_v1_copyo = 185, Instruction_kv3_v1_copyq = 186, Instruction_kv3_v1_copyw = 187, Instruction_kv3_v1_crcbellw = 188, Instruction_kv3_v1_crcbelmw = 189, Instruction_kv3_v1_crclellw = 190, Instruction_kv3_v1_crclelmw = 191, Instruction_kv3_v1_ctzd = 192, Instruction_kv3_v1_ctzw = 193, Instruction_kv3_v1_ctzwp = 194,